Email : sabir.besus@gmail.com
Address : Dept. of Electronics & Communication Engineering, Aliah University, New Town Campus, IIA/27 New Town, Kolkata-700156, India (Right Block, 4th Floor)
Phone : +91 33 2341 6577
Room No : Right Block, 5th Floor
Joined : 29-Dec-2015
Pursuing PhD School of VLSI Design IIEST Shibpur, West Bengal, India Specialiazion: Microelectronic and VLSI Design Topic: ASIC design for Gamma ray event timing and energy measurement Supervisor: Prof Hafizur Rahaman, Prof. Pradip Mondal Course Taken: Low Power VLSI Design |
Master of Technology (M. Tech) (Year of passing July 2011) From School of VLSI Design IIEST Shibpur, West Bengal, India Specialization: VLSI Design Thesis title: Transistor level S-BOX design for efficient implementation of the AES Algorithm Supervisor: Prof Hafizur Rahaman Bachelor of technology (B.Tech) (year of passing July 2009) Department: Electronics and communication Engineering Meghnad Saha Institute of Technology West Bengal University of Technology, West Bengal, India
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AlIAH UNIVERSITY, New Town, Kolkata
Designation: Assistant Professor
Department of Electronics & Communication Engineering
Duration: 3.5 Year
Subject taught for UG:
1. Basic Electronics
2. Electrical & Electronic Measurements
5. Microelectronics
6. Signals & Networks
IIEST Shibpur (Formerly BESU), Howrah, India
Position: Laboratory Engineer (SMDP II, DEITY)
School of VLSI Technology
Duration : 7 months
Subject taught for UG:
1. VLSI Physical Deisgn
VLSI Design
1. Basic Electronics
2. Electrical & Electronic Measurements
3. Microelectronics
4. Signals & Networks
To design ASIC related to
AS Chakraborty, SA Mondal, H Rahaman
Analog Integrated Circuits and Signal Processing
Springer 2016, Volume 88 (3),
Pages 495-504,
Sayan Kanungo; Sabir Ali Mondal; Sanatan Chattopadhyay; Hafizur Rahaman
IEEE Transactions on Nanotechnology
Year: 2017, Volume: 16, Issue: 6
Pages: 974 - 981
Sabir Ali Mondal, Pradip Mandal, Hafizur Rahaman
Integration, the VLSI Journal.
Year 2019,
1. Neha Ayesha (ECE162004)
Title: Microstrip Patch Antenna Design & Modelling for Efficient RF Energy Harvesting
Integrated Chip Fabrication, Packging and Testing under SMDP II Project DEITY from IIEST (Formerly BESU) Shibpur as a part-time Laboratory Engineer (11 months).
IEEE MEMBER since 2015
Reviewer: IEEE ISED 2014
SUMMER TRAINING |
(3 Months) CMC Gariahat
(5 weeks) IBM ACE, Salt lake
(1 Months) Micropro, Parkstreet |
SOFTWARE SKILL |
CAD Tools:
Programming Language
Operating System
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LANGUAGE KNOWN |
English (Read-Write-Speak) Bengali (Read-Write-Speak) Hindi (Read-Speak) |